How to streamline the design intent between architects and SoC Designers?

How to streamline the design intent between architects and SoC Designers?

Magillem leading provider of SoC design solution around the IEEE 1685 (IP-XACT) standard enhances its portfolio with a tool addressing the architecture intent capture happening early in the front end design chain.

Press Release – Paris, France – March 27th, 2018

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To bridge the gap between software intent and hardware refinement, Magillem Architecture Intent (MAI) captures, in one hand, systems from the hardware block diagram, and ensures the synchronization between hardware refinement and software interface updates. And, on the other hand, MAI captures systems from the software system map and generates an early hardware system description. This environment links each view together, at any time during the project.

Indeed, architects are often somewhat disconnected from the design teams. Mostly because the tools used to capture architectural intent are not integrated into the usual design environment. Today, the architect draws hardware system description. Then, he sends his drawing to the design team. First the job done at the architect level needs to be redone at the design level creating a duplication of efforts (in some of our customer examples as much as 80% of the actual design is actually done by the architect) ! Second If there are any changes in the design implementation, there is no way to give him back the information.

This mainly occurs because the drawing is still “basically” a piece of paper without interaction, and without any semantic value of the elements.

Practically, this sophisticated graphic editor allows a lot of freedom for each team. By generating an IP-XACT description of designs, it spreads the information from the architecture team to the design team and enables a full compliance and traceability of systems top-down and bottom-up. On the software end, it accepts standard input formats such as Excel, CMSIS, SystemRDL (with Magillem Registers Engine). On the hardware end, MAI ensures the synchronization between hardware refinement and software interface updates. It becomes easy to navigate up and down the schema hierarchy, to autoplace components, to hide and show some features, to view designs, bus interface, connections…

By providing a double entry point from either the HW intent (block Diagram view) or SW Intent (System map view) as well as ensuring the coherency of those views with further refinement, MAI is seen by many as the missing link between requirement capture and actual chip implementation.
On top of this MAI provides multiple benefits compared to a standard drawing tool like:

• A scripting interface
• A user friendly drawing environment
• Business rules natively implemented and extensible by users
• Filtering mechanism allowing to show or hide some of the information for improved readability
• Abstracting the business schema complexity allowing for a short learning curve.

Based on IP-XACT – IEEE 1685 standards, MAI can also be used in the context of ISDD®, the Magillem methodology to integrate Specification, Design and Documentation by maximizing the reuse. Integrated with Magillem Platform Assembly (MPA) and Magillem Registers View (MRV), it includes an intuitive set of tools (APIs and an editor) to help refine designs and facilitate a smooth interaction among stakeholders, all along the design workflow.