NetSpeed and Magillem partner to enable seamless IP integration of cache coherent NoC IP
Paris, France. June 1, 2016
Magillem, the leading provider of front-end design XML solutions and NetSpeed System, the supplier of the latest generation of on-chip network IP, are partnering to ease integration of semiconductor IP for heterogeneous and cache-coherent system-on-chip (SoC) architecture designs. NetSpeed has selected the Magillem Checker suite, the most comprehensive IEEE1685 test suite available, to certify that the IP-XACT files generated by its network-on-chip (NoC) platform are compliant with the industry standard.
Today’s SoC design teams face challenges resulting from growing chip complexity, reduced time to market windows, and rising density of IP on SoCs. The NoC communication IP, being at the center of most SoCs plays a major role in the success of the integration process. To ease the challenges associated with SoC integration, NetSpeed supports the IEEE 1685 with its plug and play IP capabilities in its NoC fabric.
The IEEE1685/IP-XACT description allows an immediate understanding of the NoC characteristics and enables automation of integration in large-scale SoC platforms, streamlining the entire process. This is mainly achieved by automating port and bus interface level connections and by validating the design intent for the end-to-end connectivity, memory map and register-level hardware and software interfaces.
The partnership will help strengthen the high quality of NetSpeed’s IP packages. Additionally, the companies will also leverage Magillem’s ESL expertise and ESL tools to explore solutions for the integration of NetSpeed IP into virtual platforms described using SystemC TLM.